1. Field of the Invention
The present invention relates to image conversion devices such as image compression devices, image expansion devices, or combinations thereof.
2. Description of the Background Art
FIG. 16 is a block diagram showing the structure of a conventional image compression device. This image compression device is made to realize image compression based on the so-called "JPEG algorithm" which is proposed by the JPEG (Joint Photographic Expert Group) aiming for normalization of the color still image coding system.
For each of picture elements arranged in a matrix along two directions perpendicular to each other on an image, picture signals Pm (m=0, 1, . . . ) which represent its density, luminance, etc. are sequentially provided as inputs to an image data input interface 3 of this device. A single picture signal Pm is comprised of 8 bits to represent density of a single picture element at 256 gradations. This picture signal Pm is sequentially inputted for every 8 bits to the image date input interface 3 from an external device through an image data input terminal 13 of 8-bit width in synchronization with clock signal CLK which is a periodic pulse train inputted from a clock input terminal 1.
The image data input interface 3 divides the train of the inputted picture signals Pm (m=0, 1, . . . ) for each block where 8.times.8 (=64) picture elements are arranged in a matrix along the two perpendicular scanning directions on the image and outputs them to a discrete cosine transform unit 4 on the next stage. That is to say, for each block, picture signals Pxy (x, y=0 to 7) representing density of each picture element in that block are sequentially sent from the image data input interface 3 to the discrete cosine transform unit 4 in synchronization with the clock signal CLK.
In the discrete cosine transform unit 4, two-dimensional discrete cosine transform is applied to 64 Pxy (x, y=0 to 7) in synchronization with the clock signal CLK. The 64 discrete cosine transform coefficients (referred to as "DCT coefficient" hereinafter) Suv (u, v=0 to 7) obtained by the discrete cosine transform are sequentially sent from the discrete cosine transform unit 4 to a zig-zag conversion unit 5 on the next stage in synchronization with the clock signal CLK.
In the zig-zag conversion unit 5, the DCT coefficients Suv (u, v=0 to 7) are rearranged from the order along rows and columns of matrix with the arranged DCT coefficients Suv (u, v=0 to 7) into the so-called zig-zag order. The DCT coefficients Sij (i, j=0 to 7) rearranged into the zig-zag order are then sequentially sent to a quantization unit 6 from the zig-zag conversion unit 5 in synchronization with the clock signal CLK.
In the quantization unit 6, the 64 DCT coefficients Sij (i, j=0 to 7) are quantized with step sizes which differ for each coefficient position (values of i, j) using a quantization table 7. That is to say, 64 coefficients Qij (i, j=0 to 7) defining step size of each coefficient position are previously stored in the quantization table 7, and the quantization unit 6 performs division of the DCT coefficient Sij with the coefficient Qij and makes a quotient thereof integer to obtain quantization coefficients Rij (i, j=0 to 7). This processing is performed in synchronization with the clock signal CLK. As a result, the obtained quantization coefficients Rij (i, j=0 to 7) are sent from the quantization unit 6 to a Huffman coding unit 8 on the next stage in synchronization with the clock signal CLK.
In the Huffman coding unit 8, referring to a code table 9, coding based on the Huffman coding system is applied to each of the quantization coefficients Rij (i, j=0 to 7). Information for performing the Huffman coding is previously stored in the code table 9, on the basis of which information the Huffman coding unit 8 converts the quantization coefficients Rij (i, j=0 to 7) into a train of coded signals Hn (n=0, 1. . . ) based on the Huffman coding system. This processing is performed in synchronization with the clock signal CLK. As a result, the coded signals Hn (n=0, 1, . . . ) are sent in synchronization with the clock signal CLK from the Huffman coding unit 8 to an external device such as a storage device for storing the coded signals.
The clock signal CLK is sent to an external device for inputting the picture signals Pm (m=0, 1, . . . ) to the image data input terminal 13 thorough a clock output terminal 11. This synchronizes operation of the external device with the clock signal CLK to enable input of picture signals Pm (m=0, 1, . . . ) to the image date input terminal 13 in synchronization with the clock signal CLK.
In comparison for each block, the signal size of the coded signals Hn (n=0, 1, . . . ) is made smaller than the signal size of the 64 picture signals Pxy (x, y=0 to 7). That is, this device realizes compression of the picture signals.
To reproduce the image, the picture signals must be reversely reconstructed from the coded signals Hn which are compressed picture signals. For this aim, a conventional image expansion device making a pair with the device shown in FIG. 16 is used. FIG. 17 is a block diagram showing structure of this image expansion device.
As shown in FIG.17, the coded signals Hn (n=0, 1, . . . ) are sent in the order of a Huffman decoding unit 28, a non-quantization unit 26, an inverse zig-zag conversion unit 25, an inverse discrete cosine transform unit 24 and an image data output interface 23 in synchronization with the clock signal CLK inputted from the clock input terminal 1. The image date output interface 23--the Huffman decoding unit 28 constituting the image expansion device respectively perform processings reverse to the processings in the image data input interface 3--the Huffman coding unit 8 constituting the image compression device. The code table 9 in the image compression device is referred to in the Huffman decoding unit 28 and the quantization table 7 is referred to in the non-quantization unit 26.
Accordingly, inputted coded signals Hn (n=0, 1, . . . ) are sequentially subjected to processings reverse to those in the image compression device. As a result, reconstructed picture signals Pm (m=0, 1, . . . ) are provided as outputs from the image date output interface 23. However, due to the processing made in the quantization unit 6 of the image compression device, the reconstructed picture signals Pm (m=0, 1, . . . ) are not necessarily completely the same as the picture signals Pm (m=0, 1, . . . ) before compressed, but they have been changed in the range where effective image quality is not degraded. That is to say, the system of image compression and image expansion based on the JPEG algorithm belongs to the category of non-reversible system.
The clock signal CLK is sent out to an external device to which the picture signals Pm (m=0, 1, . . . ) are inputted through the clock output terminal 11. The external device is sequentially supplied with the picture signals Pm (m=0, 1, . . . ) from the image data output interface 23 in synchronization with the clock signal CLK.
As the conventional image compression device and the image expansion device are constituted as described above, both of the input of the picture signals Pm from the external device and the output thereof to the external device must be made in synchronization with the clock signal CLK. Accordingly, if the frequency of the clock signal CLK is high and the speed of processings in the device is high, input and output of the picture signals Pm in the external device must be performed at high speed, too. That is to say, it has been a problem that input interface or output interface of the picture signals Pm provided in the external device must operate at high speed in synchronization with the clock signal CLK.
Furthermore, when simultaneously compressing or expanding picture signals Pm of a plurality of components corresponding to a plurality of color components represented by trichromatic components of the RGB (Red, Green, Blue) calorimetric system, for example, input must be made for each component unit, resulting in a problem that a buffer or the like must be additionally provided outside of the device.